Low-CTE glass fabric sounds niche. In advanced chip packaging, it is not: dimensional stability at the substrate level increasingly shapes performance, yield and supply-chain resilience.
Two American manufacturers—AGY in Aiken, South Carolina, and JPS Composite Materials in Statesville, North Carolina—say they are building North America’s first domestically made low-coefficient-of-thermal-expansion glass-fibre fabric for advanced IC substrates and next-generation semiconductor packaging. AGY will supply its proprietary L-HDI ultra-low-CTE glass fibre, while JPS will weave the finished fabric, creating a fully domestic reinforcement-material chain for high-performance electronics.
Low-CTE glass fabric matters because advanced packages need substrates that resist warpage, hold tight dimensions and support finer interconnect density. The companies explicitly target packaging platforms such as CoWoS and SoIC, which are increasingly central to AI, data-centre and high-performance computing chips. AGY says its fibre is engineered for ultra-low CTE, strong dielectric performance and consistent filament geometry; JPS brings the precision weaving needed for semiconductor-grade fabrics. Initial production has begun, with customer qualification now under way.
Washington has already made clear that domestic chip ambitions do not stop at wafer fabs. NIST’s National Advanced Packaging Manufacturing Program says U.S. semiconductor competitiveness requires a domestic advanced-packaging capability, and the Commerce Department has committed major funding to that segment.
This is a reminder that textile know-how is quietly becoming strategic in semiconductors. If AGY and JPS can qualify at scale, reinforcement fabrics may become one more backend material the U.S. no longer wants to import by default.
